gnu make - How to comment a line within a Makefile define directive? -

i want comment 1 or more line(s) within define directive in makefile line ignored when directive expanded. goal place commented line hint users of makefile show example of define directive. directive expanded target.

in other words, want makefile

define echo_foo =  #   @echo foo endef  all:      @echo before call     $(echo_foo)     @echo after call  .phony: 

to have same behavior 1 :

define echo_foo =  endef  all:      @echo before call     $(echo_foo)     @echo after call  .phony: 

the issue first makefile gives me following error :

process_begin: createprocess(null, #@echo foo, ...) failed. make (e=2): system cannot find file specified. makefile:6: recipe target 'all' failed make: *** [all] error 2

the gnu make:makefile contents page states :

within define directive, comments not ignored during definition of variable, rather kept intact in value of variable. when variable expanded either treated make comments or recipe text, depending on context in variable evaluated.

but doesn't explain in specific case # symbol treated make comment or recipe text (which seems problem meet).

can tell me how have # symbol treated comment mark in define function ?

i have tried of following lines idea of escaping # symbol or changing indentation none of them gave me correct output :

#@echo foo     #@echo foo ##@echo foo     ##@echo foo \#@echo foo     \#@echo foo  /#@echo foo     /#@echo foo  

i'm running mingw make 3.82 on windows have tried other implementations of make v3.82.90 , 4.1.

there's no way you're asking directly. contents of variable expanded in recipe context, no matter variable expands considered part of recipe , whatever characters there passed shell.

note can use : in unix shells windows command.com, because : shell no-op operator. have add space after though otherwise try run command :echo not valid command. however, further note shell still expand line! means if use backquotes etc. still expanded. note since it's statement, semicolon stop it. example:

define echo_foo : echo hi `echo there 1>&2` ; echo bye endef  all: ; @$(echo_foo) 

here, hi won't printed because echo command not run, backticks still expanded there printed (to stderr) , semicolon ends "no-op" command bye printed.

if commands simple enough : work, if they're simple 1 wonders why you're using define...

another option override variable, rather comment out:

define echo_foo =     @echo foo endef  echo_foo = 

eta: in comments affirm command simple. don't quite know mean could expanded final user or why makes difference.

but alluding if have simple command can write:

echo_foo = echo hi 

and not use define. define needed complicated commands: it's required commands contain un-escaped newlines.

and, if write:

echo_foo =# echo hi 

then commenting out content of variable using make comments, not shell comments, work everywhere.